![]() ![]() The inputs to d should be driven by something in the upper-level module that instantiates d. If you make d an input to a module (in line A), you should not be driving it like you are in line B. Your first problem is here: module d(q,q1,d,c) //D Flip Flop Let me know if you have any specific questions about how this implementation works. ![]() If you really want to use an external module for the adder (which is really the point of your question), simply substitute the wire declaration above with the following block of code: wire sum I've added a done signal to the module interface to make this explicit. Secondly, an elaborate state machine isn't required the module can simply produce a final result four clocks after each activation of the start signal. Rather than addressing the many problems in your source code, let me just show how I'd implement the module you describe.įirst, I wouldn't use a sub-module to build the adder synthesis tools are perfectly able to create adders from behavioral code. ![]()
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